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MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.1 overview 1.1.1 overview the mn103s is a 32-bit microcontroller combining ease of use intended for programs development in the c lan- guage with a simple, high-performance architecture ma de possible through pursuit of cost performance. built around a compact 32-bit cp u with a basic instruction word length of 1 byte, this lsi includes internal mem- ory for instructions and data, a clock generator, bus controller, interrupt controller, watchdog timer, standard peripheral circuitry such as timers and serial interfaces, pwm circuit best suited to controlling 3-phase motors and a/d converters for motor position control. the mn103s series? high-speed cpu coupled with abundance of peripheral features provides an eas y means of developing low-cost, high-performance and multifunctional system on chip for motor and power control applications requiri ng fast response - a feature pr eviously unavailable with conventional microcontrollers. 1.1.2 product summary this manual describes the following model. table:1.1.1 product summary model rom size ram size classification MN103SFM9K 256 k 8 k flash eeprom version
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.2 hardware functions cpu core mn103s core 4 gb of linear address space (for instructions / data) load/store architecture with 5-stage pipeline 46 basic instructions + 4 extension instructions 6 addressing modes instruction set of 1 byte in word length machine cycle: 16.7 ns (oscillation frequency: 10 mhz, 6 multiply) operation mode: normal mode oscillation circuit external high-speed oscill ation (crystal/ ceramic) clock multiplication circuit external high-speed oscillation is multiplied by 4, 6 and 8. operating voltage 3.6 v to 5.5 v guaranteed operating temperature -40 c to 85 c internal memory rom 256 kbytes ram 8 kbytes interrupts non-maskable interrupt: watchdog timer overflow interrupts, system error interrupts internal interrupts: 47 interrupts timer 0 underflow interrupts timer 1 underflow interrupts timer 2 underflow interrupts timer 3 underflow interrupts timer 4 underflow interrupts timer 5 underflow interrupts timer 6 underflow interrupts timer 7 underflow interrupts timer 8 overflow/underflow interrupts timer 8 compare/capture a interrupts timer 8 compare/capture b interrupts timer 9 overflow/underflow interrupts timer 9 compare/capture a interrupts timer 9 compare/capture b interrupts timer 10 overflow/underflow interrupts timer 10 compare/capture a interrupts timer 10 compare/capture b interrupts timer 11 overflow/underflow interrupts timer 11 compare/capture a interrupts timer 11 compare/capture b interrupts timer 12 overflow/underflow interrupts timer 12 compare/capture a interrupts timer 12 compare/capture b interrupts
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e timer 13 overflow/underflow interrupts timer 13 compare/capture a interrupts timer 13 compare/capture b interrupts timer 14 underflow interrupts timer 15 underflow interrupts timer 16 underflow interrupts timer 17 underflow interrupts serial 0 recep tion interrupts serial 0 transmission interrupts serial 1 recep tion interrupts serial 1 transmission interrupts serial 2 recep tion interrupts serial 2 transmission interrupts pwm0 overflow interrupts pwm0 underflow interrupts pwm1 overflow interrupts pwm1 underflow interrupts a/d 0 conversion complete interrupt a/d 0 conversion complete b interrupt a/d 1 conversion complete interrupt a/d 1 conversion complete b interrupt a/d 2 conversion complete interrupt external interrupts: 9 interrupts interrupt pins: irq00 to irq08 interrupt detection condition: edge (rising edge, falling edge), both edge s, high-level detection, low-level detection noise filter?s filtering is possible at all conditions. timer counter 8-bit timer 12 sets 16-bit timer 6 sets timer 0 (8-bit timer for general use) - interval timer, timer pulse output, event count - count clock source, tm0io pin input ioclk, ioclk/8, ioclk/32, ioclk/128, timer 1 underflow, timer 2 underflow, tm0io pin input timer 1 (8-bit timer for general use) - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, timer 0 underflow, timer 2 underflow, tm1io pin input timer 2 (8-bit timer for general use) - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, ioclk/128, timer 0 underflow, timer 1 underflow, tm2io pin input timer 3 (8-bit timer for general use)
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, tm3io pin input, timer 0 underflow, timer 1 underflow, timer 2 underflow, timer 4 (8-bit timer for general use) - interval timer, timer pulse output, event count, - count clock source ioclk, ioclk/8, ioclk/32, ioclk/128, tm4io pin input, timer 5 underflow, timer 6 underflow timer 5 (8-bit timer for general use) - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, timer 4 underflow, timer 6 underflow, tm5io pin input timer 6 (8-bit timer for general use) - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, ioclk/128, tm6io pin input, timer 4 underflow, timer 5 underflow timer 7 (8-bit timer for general use) - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, tm7io pin input, timer 4 underflow, timer 5 underflow, timer 6 underflow timer 8 (16-bit timer for general use) - interval timer, timer pulse output, event count, pwm output, input capture, one-shot output, external trigger start - count clock source ioclk, ioclk/8, ioclk/64, timer 2 underflow, tm8bio pin input timer 9 (16-bit timer for general use) - interval timer, timer pulse output, event count, pwm output, input capture, one-shot output, external trigger start - count clock source ioclk, ioclk/8, ioclk/64, timer 3 underflow, tm9bio pin input timer 10 (16-bit timer for general use) - interval timer, timer pulse output, event count, pwm output, input capture, one-shot output, external trigger start - count clock source ioclk, ioclk/8, timer 0 underflow, timer 1 underflow, tm10bio pin input timer 11 (16-bit timer for general use) - interval timer, timer pulse output, event count, pwm output, input capture, one-shot output, external trigger start - count clock source ioclk, ioclk/8, timer 4 underflow, timer 5 underflow, tm11io pin input timer 12 (16-bit timer for general use)
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e - interval timer, trigger start 3-phase pwm, ad conversion start - count clock source mclk, mclk/8, ioclk, ioclk/8, timer 6 underflow, timer 7 underflow timer 13 (16-bit timer for general use) - interval timer, trigger start 3-phase pwm, ad conversion start - count clock source mclk, mclk/8, ioclk, ioclk/8, timer 6 underflow, timer 7 underflow timer 14 (8-bit timer for general use) - interval timer, timer pulse output, event count, baud rate timer - count clock source ioclk, ioclk/8, ioclk/32, ioclk/128, timer 15 underflow, timer 16 underflow, tm14io pin input timer 15 (8-bit timer for general use) - interval timer, baud rate timer, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, timer 14 underflow, timer 16 underflow timer 16 (8-bit timer for general use) - interval timer, timer pulse output, event count, baud rate timer, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, ioclk/128, timer 14 underflow, timer 15 underflow, tm16io pin input timer 17 (8-bit timer for general use) - interval timer, timer pulse output, event count, cascade connection function - count clock source ioclk, ioclk/8, ioclk/32, tm17io pin input, timer 14 underflow, timer 15 underflow, timer 16 underflow watchdog timer detection time 6.55 ms to 1677.72 ms (oscillation frequency 10 mhz ) generates non-maskable interrupts at detection generates hard-reset at second consecutive overflow a /d converter a/d0 - resolution 10 bits - minimum conversion time 1.0 sec - channels 8 channels (adin00 to adin05, adin18, adin19) - use of 3 converters allows simultaneous sampling of 3 phases - a/d conversion start trigger is in synchronization with complementary 3-phase pwm cycle and 16-bit timer a/d1 - resolution 10 bits - minimum conversion time 1.0 sec - channels 8 channels (adin02 to adin09) - use of 3 converters allows simultaneous sampling of 3 phases - a/d conversion start trigger is in synchronization with complementary 3-phase pwm cycle and 16-bit timer a/d2
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e - resolution 10 bits - minimum conversion time 1.0 sec - channels 16 channels (adin00, adin01, adin06 to adin19) - use of 3 converters allows simultaneous sampling of 3 phases - a/d conversion start trigger is in synchronization with complementary 3-phase pwm cycle and 16-bit timer complementary 3-phase pwm output 2 channels - min. resolution: 33.3 nsec - triangular and saw-tooth waves output - incorporates a dead time insertion circuit - can overwrite registers by double buffer during pwm operation - pwm output protection circuit supporting external interrupts - output timing varying function serial interface 3 channels serial 0 (full dupl ex uart/synchronous serial interface) synchronous serial interface - overrun error detection - transfer clock source 1/2 and 1/16 of timer 14 underflow, 1/2 and 1/16 of timer 15 underflow, and 1/2 and 1/16 of timer 16 underflow, sbt0 pin - can be selected as the first bit to be transferred, any transfer size from 7 to 8 bits can be selected. - maximum transfer rate: 3.0 mbps full duplex uart - parity error, overrun erro r, and flaming error detection - transfer clock source 1/16 of timer 14 underflow, 1/16 of timer 15 underflow, and 1/16 of timer 16 underflow, - can be selected as the first bit to be transferred, any transfer size from 7 to 8 bits can be selected. - continuous transmission, r eception, and tran smission/reception - maximum transfer rate: 375 kbps serial 1 (full dupl ex uart/synchronous serial interface) synchronous serial interface - overrun error detection - transfer clock source 1/2 and 1/16 of timer 14 underflow, 1/2 and 1/16 of timer 15 underflow, and 1/2 and 1/16 of timer 16 underflow, sbt1 pin - can be selected as the first bit to be transferred, any transfer size from 7 to 8 bits can be selected. - maximum transfer rate: 3.0 mbps full duplex uart - parity error, overrun erro r, and flaming error detection - transfer clock source 1/16 of timer 14 underflow, 1/16 of timer 15 underflow, and 1/16 of timer 16 underflow, - can be selected as the first bit to be transferred, any transfer size from 7 to 8 bits can be selected. - continuous transmis sion, reception, and transmission/reception - maximum transfer rate: 375 kbps serial 2 (full dupl ex uart/synchronous serial interface)
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e synchronous serial interface - overrun error detection - transfer clock source 1/2, 1/4, 1/16, and 1/64 of timer 14 underflow, 1/2, 1/4, 1/16, and 1/64 of timer 15 underflow, 1/2, 1/4, 1/16, and 1/64 of timer 16 underflow, ioclk/2, ioclk/4, sbt2 pin - can be selected as the first bit to be transferred, any transfer size from 2 to 8 bits can be selected. - continuous transmission, r eception, and tran smission/reception - maximum transfer rate: 5.0 mbps full duplex uart - parity error, overrun er ror and flaming error detection - transfer clock source 1/32, 1/64, 1/256, and 1/1024 of timer 14 underflow, 1/32, 1/64, 1/256, and 1/1024 of timer 15 underflow, 1/32, 1/64, 1/256, and 1/1024 of timer 16 underflow, ioclk/32, ioclk/64 - can be selected as the first bit to be transferred, any transfer size from 7 to 8 bits can be selected. - continuous transmission, r eception, and tran smission/reception - maximum transfer rate: 300 kbps regulator incorporates regulator, and use of 5 v power supply is possible power supply detection (auto reset circuit) detection level 3.6 v to 4.3 v when power supply voltage is under detection level, reset is generated. port / pins i/o ports 81 pins motor control output 12 pins external interrupt 9 pins a/d input 20 pins special pins 17 pins reset input pin 1 pin oscillation pin 2 pins test pin 3 pins power pin 11 pins package qfp100 (18 mm square, 0.65 mm pitch) code name qfp100-p-1818b
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.3 pin description 1.3.1 pin configuration figure:1.3.1 pin configuration p51/tm7io p50/tm6io p47/tm10bi o p56/pwm02 p55/npwm0 1 p54/pwm01 p53/npwm0 0 p46/tm10ai o p60 p57/npwm0 2 p66/pwm12 p65/npwm1 1 p64/pwm11 p63/npwm1 0 p62/pwm10 p61 p52/pwm00 vss p72/tm11io 0 vdd p67/npwm1 2 p75/tm11o 3 p74/tm11o 2 vdd2 p73/tm11io 1 p17/sbo2 p23/sbt1 p22/sbo1 p21/sbi2 p20/sbt2 p27/sbi0 p26/sbt0 p25/sbo0 p24/sbi1 p33/tm3io p32/tm2io p31/tm1io p30/tm0io vss p35/tm5io vdd p34/tm4io p41/tm9bo p40/tm9ao p37/tm8bio p36/tm8aio p45/tm10bo p44/tm10ao p43/tm9bio p42/tm9aio p16/tm17io p13/irq07 p14/irq08 nrst p15/tm16io vdd2 e xtrg0/p10/irq04 e xtrg1/p11/irq05 p12/irq06 vss vppex vdd vdd pb2/adin18 pb3/adin19 osco osci pb1/adin17 test1 test2 test3 pa5/adin13 pa6/adin14 pa7/adin15 pb0/adin16 pa4/adin12 pa0/adin08 pa1/adin09 pa2/adin10 pa3/adin11 vdd p95/adin05 p96/adin06 p97/adin07 p92/adin02 p93/adin03 vss p94/adin04 p87 p90/adin00 p91/adin01 p82/irq02 p83/irq03 p84/tm14io tcpout p86 p 76/tm11o4 p 77/tm11o5 p80/irq00 p81/irq01 76 80 79 78 77 84 83 82 81 88 87 86 85 92 91 90 89 96 95 94 93 100 99 98 97 72 73 74 75 68 69 70 71 64 65 66 67 60 61 62 63 56 57 58 59 52 53 54 55 51 50 46 47 48 49 42 43 44 45 38 39 40 41 34 35 36 37 30 31 32 33 26 27 28 29 25 21 22 23 24 17 18 19 20 13 14 16 15 9 10 11 12 5 6 7 8 1 2 3 4 MN103SFM9K 100pinqfp 0.65 pitch
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.3.2 pin specification table:1.3.1 pin specification pin special functions i/o direction control pin control function description p07 nrst in/out - - reset input p10 p11 p12 p13 p14 p15 p16 p17 irq04/extrg0 irq05/extrg1 irq06 irq07 irq08 tm16io tm17io sbo2 in/out in/out in/out in/out in/out in/out in/out in/out p10d p11d p12d p13d p14d p15d p16d p17d p10r p11r p12r p13r p14r p15r p16r p17r external interrupt input 4/ trigger pin 0 for on-board debugging external interrupt input 5/ trigger pin 1 for on-board debugging external interrupt input 6 external interrupt input 7 external interrupt input 8 timer 16 input / output timer 17 input / output serial 2 transmission data output p20 p21 p22 p23 p24 p25 p26 p27 sbt2 sbi2 sbo1 sbt1 sbi1 sbo0 sbt0 sbi0 in/out in/out in/out in/out in/out in/out in/out in/out p20d p21d p22d p23d p24d p25d p26d p27d p20r p21r p22r p23r p24r p25r p26r p27r serial 2 clock i/o serial 2 reception data input serial 1 transmission data output serial 1 clock i/o serial 1 reception data input serial 0 transmission data output serial 0 clock i/o serial 0 reception data input p30 p31 p32 p33 p34 p35 p36 p37 tm0io tm1io tm2io tm3io tm4io tm5io tm8aio tm8bio in/out in/out in/out in/out in/out in/out in/out in/out p30d p31d p32d p33d p34d p35d p36d p37d p30r p31r p32r p33r p34r p35r p36r p37r timer 0 i/o timer 1 i/o timer 2 i/o timer 3 i/o timer 4 i/o timer 5 i/o timer 8a i/o timer 8b i/o p40 p41 p42 p43 p44 p45 p46 p47 tm9ao tm9bo tm9aio tm9bo tm10ao tm10bo tm10aio tm10bio in/out in/out in/out in/out in/out in/out in/out in/out p40d p41d p42d p43d p44d p45d p46d p47d p40r p41r p42r p43r p44r p45r p46r p47r timer 9a output timer 9b output timer 9a i/o timer 9b i/o timer 10a output timer 10b output timer 10a i/o timer 10b i/o p50 p51 p52 p53 p54 p55 p56 p57 tm6io tm7io pwm00 npwm00 pwm01 npwm01 pwm02 npwm02 in/out in/out in/out in/out in/out in/out in/out in/out p50d p51d p52d p53d p54d p55d p56d p57d p50r p51r p52r p53r p54r p55r p56r p57r timer 6 i/o timer 7 i/o 3-phase pwm0 signal output 0 3-phase pwm0 signal reverse output 0 3-phase pwm0 signal output 1 3-phase pwm0 signal reverse output 1 3-phase pwm0 signal output 2 3-phase pwm0 signal reverse output 2 p60 p61 p62 p63 p64 p65 p66 p67 - - pwm10 npwm10 pwm11 npwm11 pwm12 npwm12 in/out in/out in/out in/out in/out in/out in/out in/out p60d p61d p62d p63d p64d p65d p66d p67d p60r p61r p62r p63r p64r p65r p66r p67r - - 3-phase pwm1 signal output 0 3-phase pwm1 signal reverse output 0 3-phase pwm1 signal output 1 3-phase pwm1 signal reverse output 1 3-phase pwm1 signal output 2 3-phase pwm1 signal reverse output 2 p72 p73 p74 p75 p76 p77 tm11io0 tm11io1 tm11o2 tm11o3 tm11o4 tm11o5 in/out in/out in/out in/out in/out in/out p72d p73d p74d p75d p76d p77d p72r p73r p74r p75r p76r p77r timer 11 i/o 0 timer 11 i/o 1 timer 11 output 2 timer 11 output 3 timer 11 output 4 timer 11 output 5
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e p80 p81 p82 p83 p84 p86 p87 irq00 irq01 irq02 irq03 tm14io - - in/out in/out in/out in/out in/out in/out in/out p80d p81d p82d p83d p84d p86d p87d p80r p81r p82r p83r p84r p86r p87r external interrupt input 0 external interrupt input 1 external interrupt input 2 external interrupt input 3 timer 14 i/o - - p90 p91 p92 p93 p94 p95 p96 p97 adin00 adin01 adin02 adin03 adin04 adin05 adin06 adin07 in/out in/out in/out in/out in/out in/out in/out in/out p90d p91d p92d p93d p94d p95d p96d p97d p90r p91r p92r p93r p94r p95r p96r p97r ad analog signal input 0 ad analog signal input 1 ad analog signal input 2 ad analog signal input 3 ad analog signal input 4 ad analog signal input 5 ad analog signal input 6 ad analog signal input 7 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa7 adin08 adin09 adin10 adin11 adin12 adin13 adin14 adin15 in/out in/out in/out in/out in/out in/out in/out in/out pa0d pa1d pa2d pa3d pa4d pa5d pa6d pa7d pa0r pa1r pa2r pa3r pa4r pa5r pa6r pa7r ad analog signal input 8 ad analog signal input 9 ad analog signal input 10 ad analog signal input 11 ad analog signal input 12 ad analog signal input 13 ad analog signal input 14 ad analog signal input 15 pb0 pb1 pb2 pb3 adin16 adin17 adin18 adin19 in/out in/out in/out in/out pb0d pb1d pb2d pb3d pb0r pb1r pb2r pb3r ad analog signal input 16 ad analog signal input 17 ad analog signal input 18 ad analog signal input 19 pin special functions i/o direction control pin control function description
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.3.3 pin functions table:1.3.2 pin functions name tqfp 48 pin no. i/o other function function description vdd vdd vdd vdd vdd 17 40 41 65 94 - power supply pin power pin for 5 v, digital io. apply 5 v to all of pins and connect capacitor of over 10 f between all of the vdd and vss pins. (allocate near the pins) it is recommended that total capacitance between all of the vdd and vss is more than 10-times capacitance between all of the vdd2 and vss. vdd2 vdd2 42 98 - power supply pin power pin for 1.8 v, digital io connect capacitor of over 1 f between all of the vdd2 and vss pins. (allocate near the pins) vss vss vss vss 15 38 67 96 - power supply pin gnd for digital vppex 39 - power supply pin power for flash eeprom connect with vdd. osc1 osc0 37 36 input output - clock input pin clock output pin extend ceramic or crystal oscillators or input a clock to osc1. nrst 48 input - reset pins (negative logic) this pin resets the chip when power is turned on and contains an internal pull-up resistor. setting this pin ?l? level initialize the internal state of the device. thereafter, setting the input to ?h? level releases the reset. the hardware waits for the system clock to stabilize, then processes the reset interrupt. connect capacitor of over 0.1 f between nrst and vss pins. p10 p11 p12 p13 p14 p15 p16 p17 43 44 45 46 47 49 50 51 i/o irq04/ extrg0 irq05/ extrg1 irq06 irq07 irq08 tm6io tm7io sbo2 i/o port 1 8-bit cmos i/o port. each bit can be set individually as either an input or output by the p1dir register. a pull-up resistor for each bit can be selected individually by the p1plu register. at reset, the input mode (p10 to p17) is selected, and pull-up resistor is disable. p20 p21 p22 p23 p24 p25 p26 p27 52 53 54 55 56 57 58 59 i/o sbt2 sbi2 sbo1 sbt1 sbi1 sbo0 sbt0 sbi0 i/o port 2 8-bit cmos i/o port. each bit can be set individually as either an input or output by the p2dir register. a pull-up resistor for each bit can be selected individually by the p2plu register. at reset, the input mode (p20 to p27) is selected, and pull-up resistor is disable. p30 p31 p32 p33 p34 p35 p36 p37 60 61 62 63 64 66 68 69 i/o tm0io tm1io tm2io tm3io tm4io tm5io tm8aio tm8bio i/o port 3 8-bit cmos i/o port. each bit can be set individually as either an input or output by the p3dir register. a pull-up resistor for ech bit can be selected individually by the p3plu register. at reset, the input mode (p30 to p37) is selected, pull-up resistor is disable.
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e p40 p41 p42 p43 p44 p45 p46 p47 70 71 72 73 74 75 76 77 i/o tm9aio tm9bio tm9aio tm9bio tm10ao tm10bo tm10aio tm10bio i/o port 4 8-bit cmos i/o port. each bit can be set individually as either an input or output by the p4dir register. a pull-up resistor for each bit can be selected individually by the p4plu register. at reset, the input mode (p40 to p47) is selected and pull-up resistor is disable. p50 p51 p52 p53 p54 p55 p56 p57 78 79 80 81 82 83 84 85 i/o tm6ao tm7bo pwm00 npwm00 pwm01 npwm01 pwm02 npwm02 i/o port 5 8-bit cmos i/o port. each bit can be set individually as either an input or output by the p5dir register. a pull-up resistor for each bit can be selected individually by the p5plu register. at reset, the input mode (p50 to p57) is selected and pull-up resistor is disable. p60 p61 p62 p63 p64 p65 p66 p67 86 87 88 89 90 91 92 93 i/o pwm10 npwm10 pwm11 npwm11 pwm12 npwm12 i/o port 6 8-bit cmos i/o port. each bit can be set individually as either an input or output by the p6dir register. a pull-up resistor for each bit can be selected individually by the p6plu register. at reset, the input mode (p60 to p67) is selected and pull-up resistor is disable. p72 p73 p74 p75 p76 p77 95 97 99 100 1 2 i/o tm11io0 tm11io1 tm11o2 tm11o3 tm11o4 tm11o5 i/o port 7 6-bit cmos i/o port. each bit can be set individually as either an input or output by the p7dir register. a pull-up resistor for each bit can be selected individually by the p7plu register. at reset, the input mode (p72 to p77) is selected and pull-up resistor is disable. p80 p81 p82 p83 p84 p86 p87 3 4 5 6 7 9 10 i/o irq00 irq01 irq02 irq03 tm14io i/o port 8 7-bit cmos input port. each bit can be set individually as either an input or output by the p8plu register. a pull-up resistor for each bit can be selected individually by the p8plu register. at reset, the input mode (p80 to p87) is selected and pull-up resistor is disable. p90 p91 p92 p93 p94 p95 p96 p97 11 12 13 14 16 18 19 20 i/o adin00 adin01 adin02 adin03 adin04 adin05 adin06 adin07 i/o port 9 8-bit cmos input port. each bit can be set individually as either an input or output by the p9dir register. a pull-up resistor for each bit can be selected individually by the p9plu register. at reset, the input mode (p90 to p97) is selected and pull-down resistor is disable. pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa7 21 22 23 24 25 26 27 28 i/o adin08 adin09 adin10 adin11 adin12 adin13 adin14 adin15 i/o port a 8-bit cmos input port. each bit can be set individually as either an input or output by the padir register. a pull-up resistor for each bit can be selected individually by the paplu register. at reset, the input mode (pa0 to pa7) is selected and pull-down resistor is disable. pb0 pb1 pb2 pb3 29 30 34 35 i/o adin16 adin17 adin18 adin19 i/o port b 4-bit cmos input port. each bit can be set individually as either an input or output by the p8dir register. a pull-up resistor for each bit can be selected individually by the p8plu register. at reset, the input mode (p40 to p47) is selected and pull-down resistor is disable. name tqfp 48 pin no. i/o other function function description
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e sb00 sb01 sb02 57 54 51 output p25 p22 p17 serial interface transmission out- put pin transmission data output pins for serial interface 0, 1, and 2. select output mode by the p1dir and p2dir registers and serial pin function by the p1md and p2md registers. these can be used as normal i/o pins when the serial interface is not used. sbi0 sbi1 sbi2 59 56 53 input p27 p24 p21 serial interface reception data input pin reception data input pins for serial interface 0, 1, and 2. pull-up resistor can be selected by the p2plu register. select input mode by the p2dir register. these can be used as normal i/o pins when the serial interface is not used. sbt0 sbt1 sbt2 58 55 52 i/o p26 p23 p20 serial interface clock i/o pin clock i/o pins for serial interface 0, 1, and 2. pull-up resistor can be selected by the p2plu register. select i/o mode by the p2dir register and serial pin function by the p2md register. these can be used as normal i/o pins when the serial interface is not used. tm0io tm1io tm2io tm3io tm4io tm5io tm6io tm7io tm14io tm16io tm17io 60 61 62 63 64 66 78 79 7 49 50 i/o p30 p31 p32 p33 p34 p35 p50 p51 p84 p15 p16 timer i/o pin event counter input and timer pulse output pin for 8-bit timer 0 to 7, and 14 to 17. to use this pin as event counter input, select input mode by the p1, 3, 5, and 8dir regis- ters. in input mode, pull-up resistor can be selected by the p1, 3, 5, and 8plu registers. to use this pin as timer pulse output, select timer output pin by the p1,3,5, and 8md registers and set to output mode by the p1,3,5, and 8dir registers. these can be used as normal i/o pins when these are not used as timer i/o pins. tm8aio tm8bio tm9aio tm9bio tm10aio tm10bio tm11io0 tm11io1 68 69 72 73 76 77 95 97 i/o p36 p37 p42 p43 p46 p47 p72 p73 timer i/o pin event counter input, toggle output, and pwm output pin for 16-bit timer 8 to 11. to use this pin as event counter input, select input mode by the p3, 4, and 7dir registers. in input mode, pull-up resistor can be selected by the p3, 4, and 7plu register. to use this as timer output and pwm output, select timer output pin by the p3, 4, and 7md registers, and set to output mode by the p3, 4, and 7dir register. these can be used as normal i/o pins when these are not used as timer i/o pins. tm9ao tm9bo tm10ao tm10bo 70 71 74 75 output p40 p41 p44 p45 timer output pin pwm output pin for 16-bit timer 9 and 10. to use this pin as timer output and pwm out- put, select timer output pin by the p4md reg- ister and set to output mode by the p4dir register. these can be used as normal i/o pins when these are not used as timer i/o pins. tm11io0 tm11io1 tm11o2 tm11o3 tm11o4 tm11o5 95 97 99 100 1 2 output p72 p73 p74 p75 p76 p76 p77 pwm output pin motor control pwm signal output pin for 16- bit timer 11. pwm signal for 16-bit timer 11 is output to 6 pins simultaneously. to use this pin as pwm output, select timer output pin by the p7md register and set to output mode by the p7dir register. these can be used as normal i/o pins when these are not used as timer i/o pins. name tqfp 48 pin no. i/o other function function description
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e .. vppex is a power supply for flas h eeprom rewriting. its pote ntial should be the same as vdd. .. adin00 adin01 adin02 adin03 adin04 adin05 adin06 adin07 adin08 adin09 adin10 adin11 adin12 adin13 adin14 adin15 adin16 adin17 adin18 adin19 11 12 13 14 16 18 19 20 21 22 23 24 25 26 27 28 29 30 34 35 input p90 p91 p92 p93 p94 p95 p96 p97 pa0 pa1 pa2 pa3 pa4 pa5 pa6 pa7 pb0 pb1 pb2 pb3 analogue input pin analogue input pins for an 20-channel, 10-bit 3 a/d converters. these can be used as normal i/o pins when these are not used as analog input. irq00 irq01 irq02 irq03 irq04 irq05 irq06 irq07 irq08 3 4 5 6 43 44 45 46 47 input p80 p81 p82 p83 p10/ extrg0 p11/ extrg1 p12 p13 p14 external interrupt pin external interrupt input pins. the valid edge can be selected. set whether both edges are detected or not by the edge detection register (irqedgesel). when it is set not to detect both edges, select rising edge, falling edge, h level, or l level by the external interrupt condition specification reg- ister (extmd0 and extmd1). when it is set to detect both edges, select rising edge by the external interrupt condition setting regis- ter. pwm00 pwm01 pwm02 pwm10 pwm11 pwm12 80 82 84 88 90 92 output p52 p54 p56 p62 p64 p66 motor control pwm signal out- put pin motor control 3-phase pwm signal output pin select pwm signal output pin by the p5md and p6md registers and set to pwm output by the pwmoff register. these can be used as normal i/o pins when these is not used as pwm signal output pin. npwm00 npwm01 npwm02 npwm11 npwm12 npwm13 81 83 85 89 91 93 output p53 p55 p57 p63 p65 p67 motor control pwm signal reverse output pin motor control 3-phase pwm signal revers output pin. select pwm signal output pin by the p5md and p6md registers and set to pwm output by the pwmoff register. these can be used as normal i/o pins when these is not used as pwm signal output pin. test1 test2 test3 tcpout 31 32 33 8 input - test signal input test signal input pin built-in pull-up resistor. pull-up with resistor of 1 k or more. select a fixed to ?l? for tcpout. name tqfp 48 pin no. i/o other function function description
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.4 block diagram 1.4.1 block diagram figure:1.4.1 block diagram pb3,adin1 pb2,adin1 pb1,adin1 pb0,adin1 p97,adin0 p96,adin0 p95,adin0 p94,adin0 p93,adin0 extrg0/irq04,p10 p92,adin0 extrg1/irq05,p11 p91,adin0 irq06,p12 p90,adin0 irq07,p13 irq08,p14 tm16io,p15 tm17io,p16 sbo2,p17 crystal/ ceramic high-speed oscillation circuit cpu mn103s ram 8 kb rom 256 k tm9ao,p40 tm10bo,p45 tm10aio,p46 tm10bio,p47 tm9bo,p41 tm9aio,p42 tm9bio,p43 tm10ao,p44 pwm10,p62 npwm10,p63 npwm11,p65 pwm12,p66 pwm11,p64 npwm12,p67 port 6 p60 p61 watchdog timer vdd18 osci osco vdd5 vss port 9 port a port b port 1 port 8 pa7,adin1 pa6,adin1 pa5,adin1 pa4,adin1 pa3,adin1 pa2,adin1 pa1,adin0 pa0,adin0 tm6io,p50 npwm01,p55 pwm02,p56 npwm02,p57 port 5 tm7io,p51 pwm00,p52 npwm00,p53 pwm01,p54 tm11o2,p74 tm11o3,p75 tm11o5,p77 tm11o4,p76 port 7 tm11io0,p72 tm11io1,p73 p84,tm14i p83,irq03 p81,irq01 p82,irq02 p80,irq00 p87 p86 sbt2,p20 sbi2,p21 sbo1,p22 sbt1,p23 sbi1,p24 sbo0,p25 sbt0,p26 sbi0,p27 port 2 tm0io,p30 tm1io,p31 tm2io,p32 tm3io,p33 tm4io,p34 tm5io,p35 tm8aio,p36 tm8bio,p37 port 3 port 4 serial interface0 serial interface1 serial interface2 a/d conversion 0 a/d conversion 1 a/d conversion 02 pwm0 pwm1 external interrupt 16bit timer 9 16bit timer10 16bit timer11 16bit timer12 16bit timer13 16bit timer 8 pll 8bit timer 0 8bit timer 1 8bit timer 2 8bit timer 3 8bit timer 4 8bit timer 5 8bit timer 6 8bit timer 7 8bit timer15 8bit timer14 8bit timer16 8bit timer17 extension function
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.5 electrical characteristics this lsi manual describes the standard specification. electrical characteristics given in this section are prelim inary and subject to change without notice. when using lsi, contact our sales office for product specifications. 1.5.1 absolute maximum ratings model cmos lsi application general-purpose function cmos 32-bit 1 chip microcontroller v ss =0.0 v parameter symbol rating unit a1 external supply voltage v dd -0.3 to +7.0 v a2 internal supply voltage v dd2 -0.3 to +2.5 v a3 input pin voltage v i1 -0.3 to v dd +0.3 (upper limit: 7.0) v a4 i/o pin voltage v io -0.3 to v dd +0.3 (upper limit: 7.0) v a5 peak output current i opeak 15 ma a6 typ. range output current i oavg 8 ma a7 operating ambient temperature t opr -40 to +85 c a8 storage temperature t stg -40 to +125 c a9 power dissipation p d 750 mw note: the absolute maximum ratings are the limit values beyond which the lsi may be damaged. it is not guarantee the operation in these conditions. the rating of the average output current is applied for the period of any 100 ms. note: it cannot supply the internal power supply voltage to a circuit except this lsi.
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.5.2 operating conditions figure:1.5.1 oscillation v ss =0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. b1 external supply voltage1 v dd - v rst 5.0 5.5 v note) for power supply detection level v rst , refer to ?auto reset circuit characteristics?. oscillation v dd = v rst to 5.5 v v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. b2 input frequency f osc - 5.0 - 15 mhz b3 internal feedback resistor r fb - - 1.2 - m note) capacity value differs depending on oscillators to be used. consult the oscillator mamufacture for the appropriate circui t constant. oscillator (ceramic, crystal) osci osco c1 c2 r fb
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e figure:1.5.2 osci timing chart v dd = 5.0 v v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. external clock input 1 osci (osco left open) b4 clock frequency fcp - 5.0 - 15.0 mhz b5 high-level pulse width twh1 figure:1.5.2 25.0 - - ns b6 low-level pulse width twl1 25.0 - - ns b7 rise time twr1 figure:1.5.2 - - 5.0 ns b8 fall time twf1 - - 5.0 ns note: be sure that the clock duty ratio is 45 % to 55 %. t wh1 t wl1 t wf1 1/fcp t wr1 0.7v dd 0.3v dd
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.5.3 dc characteristics dc characteristics v ss =0.0 v ta = - 4 0 c to +85 c output pin left open parameter symbol conditions limits unit typ. max. c1 power supply current in normal mode i dd1 v dd = 5.0 v f osc = 10 mhz, pll is used. mclk= 60 mhz, ioclk =30 mhz peripheral circuits are stopped. 20 - ma c2 i dd2 v dd = 5.0 v f osc = 10 mhz, pll is used. mclk= 60 mhz, ioclk =30 mhz peripheral circuits are operating. -35 ma v dd = 5.0 v v ss = 0.0 v ta= -40 c to +85 c parameter symbol conditions limits unit min. typ. max. input pins1 nrst, test1, test2 c3 input voltage high level v ih1 -v dd x 0.7 - v dd v c4 input voltage low level v il1 -v ss -v dd x 0.3 v c5 internal pull-up resistor r io1 v dd =5.0 v, v in = 0 v 15 30 60 k v dd = 5.0 v v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. input pins 2 vppex, test3 c6 input voltage high level v ih2 -v dd x 0.7 - v dd v c7 input voltage low level v il2 -v ss -v dd x 0.3 v
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e v dd = 5.0 v v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. i/o pin p10 to p17, p20 to p27, p30 to p37, p40 to p47, p50 to p57, p60 to p67, p72 to p77, p80 to p87, p90 to p97, pa0 to pa7, pb0 to pb3 c8 input voltage high level v ih4 - v dd x 0.7 - v dd v c9 input voltage low level v il4 - v ss -v dd x 0.3 v c10 input leak current i lk4 - -- 5 a c11 internal pull-up resistor r io4 v dd = 5.0 v, v in = 0 v 15 30 60 k c12 output voltage high level v oh4 v dd = 5.0 v, i oh = -2.5 ma 4.5 - - v c13 output voltage low level v ol4 v dd = 5.0 v, i ol0 = 2.5 ma --0.5 v
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.5.4 analog characteristics figure:1.5.3 au to reset circuit characteristics a/d0, a/d1, a/d2 v dd = 5.0 v v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. d1 resolution - - - - 10 bits d2 non-linearity error inle sampling time 150 ns a/d conversion clock 30 mhz --2lsb d3 differential linearity error dnle - - 3 lsb d4 zero transition voltage - -20 - 20 mv d5 full-scale transition voltage - 4980 - 5020 mv d6 a/d conversion time - - 1.0 - - s d7 analog input voltage v ia -v ss -v dd v d8 analog input leakage current i ia unselected channel v adin = 0 v to v dd --10 a d9 power supply current during oper- ation (vdd pin) i ad a/d conversion clock = 30 mhz -1-ma auto-reset v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. d10 power supply voltage detection level v rst -3.6-4.3v d11 change rate of power supply voltage v dd -0.2--ms/v note: connect 0.1 f capacitor between nrst and vss pins. . vdd v d d (v) ( v ) 5.0 5 . 0 time (ms) t i m e ( m s ) 4.3 4 . 3 3.6 3 . 6 1.0 1 . 0 x x+1.0 x + 1 . 0 0 i nternal reset signal reset voltage space operation voltage spac e internal reset reaction time internal reset reaction time
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.5.5 ac characteristics figure:1.5.4 reset signal pulse width reset signal input timing v dd = 5.0 v v ss = 0.0 v ta = - 4 0 c to +85 c parameter symbol conditions limits unit min. typ. max. e1 reset signal pulse width (nrst) t nrstw -1-- s n rst t nrstw
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.5.6 flash eeprom e/w characteristics v ss = 0.0 v parameter symbol conditions limits unit min typ max f1 power supply voltage at e/w v ddew v rst -5.5v f2 ambient temperature at e/w v oprew -40 - 85 c f3 permissible rewriting times e max1 large sector (32 kb) 1,000 - - times f4 permissible rewriting times e max2 small sector (8 kb) 100,000 - - times f5 data retention time t hold 10 - - years
MN103SFM9K 32-bit single-chip microcontroller publication date: august 2014 pubno. 232m9-010e 1.6 package dimension figure:1.6.1 package dimension .. the external dimensions of the package are su bject to change. before using this product, please obtain product specifications from the sales offices. ..
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202

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